Missing pulse generator

ABSTRACT

A device for supplying a pulse when a pulse is missing from a continuous train of pulses. The continuous train of pulses passes directly through the device and also to delay lines which delay each pulse so that it appears at the input of a gate circuit at approximately the same time as the next successive pulse would appear at the output of the device. If a pulse is missing, a previously received delayed pulse is passed by the gate to the output. When a pulse does appear, it inhibits the gate circuit from passing the delayed pulse.

limited motes Potent [72] Inventor Joseph N.Castellli 3,328,702 6/1967 Brown I 328/120 X Kwajalein, Marshall llslands 3,458,822 7/1969 Hahn, Jr. 307/234 [21] P 831032 Primary ExaminerDonald D. Forrer [22] Filed llllec. 1, 11969 Assistant Examiner-B. P. Davis [45] Patented I971 Artorne H M s 't Ed dJ K 11 1-1 b [73] Assignee Sylvania Electric Products, lnc. Ber] 3:51 :31 i war e er en [54] MISSING IPIUILSE GENERATOR 3 Claims, 2 Drawing Figs. STRACT A d I f l l h l I v evlce or supp ymg a pu se w en a pu se 15 [52] IILSJCI 323/1120, missing from a continuous [rain of pulses The continuous 328/162 train of pulses passes directly through the device and also to [51] lllht.CIl lllliMb 1/04 delay lines Which delay eaCh pulse so that it appears at the [50] Field oli Stem-ch 328/120, input f a gate circuit at approximately he Same time as the l29307/234232 next successive pulse would appear at the output of the device. lf a pulse is missing, a previously received delayed [56] References cued pulse is passed by the gate to the output. When a pulse does UNITED STATES PATENTS appear, it inhibits the gate circuit from passing the delayed 3,213,375 10/1965 John 328/120 X pulse.

1" i a I I I 6 8 I 7 MILLISEC 1 }& sac I S E ---w MONOSTABLE I I MULTIVIBRATOR MILTIVIBRATOR I I I I DLI RESET I DELNAY LINE SET BISTABLE I Q5 MIC'RIOSEC MULTIVIBRATOR I I I I I 0L2 I o I UR his? I 10.00I MILLISEC INDICATORS I I I I I (on) I I I 1 INPUT 2 I INPUT IJ J2 I-Jl INPUT OUTPUT l. u a I PATENTED IIuv2 IE]?! SHEET 2 0F 2 W05 (0) INPUT PULSES AT JI ,LLSEC.

(b) INPUT PuLsEs DELAYED 0.5

,uSEC. BY DL-I RESET ESQH SET (c) GATE CONTROL INHIBIT COND I IILLSEC. (d) Io.ooI MILLIsEc. DELAYED PuLsE (e) OUTPUT PULSES AT J2 I I (f) MISSING PULSE LocATIoN L. l RESET l NON-INHIBIT COND. (g) GATE CONTROL SET I INHIBIT COND.

. ,ILLSEC (h) IOIOOI MILLIsEc. DELAYED PULSE (OUTPUT OF DL-2I (i) OUTPUT PULSES AT J2 (j) OUTPUT PULSE DELAYED 0.5

MIcRosEc. BY DL-I Joseplh NCcIstelli INVEN OR MISSING rlutss esrssasrorr BACKGROUND OF THE INVENTION In the recording of received radar data where it is necessary to correlate recorded data blocks with specific main bang numbers, there is a need for a device that will supply a substitute pulse or a series of substitute pulses whenever a pulse or a series of pulses are missing from a continuous train of equally spaced pulses. In a case where the main bang number is counted and recorded for correlation, a missing main bang pulse will cause the system to lose system timing.

It is the object of this invention to provide a device which can generate a substitute pulse or a series of substitute pulses whenever a pulse or series of pulses are missing from a continuous train of constantly spaced pulses.

SUMMARY OF THE INVENTION Each pulse in a continuous train of pulses passes through the missing pulse generator. Should any one pulse or any series of pulses be missing, the missing pulse generator supplies the missing pulse or pulses. Each pulse passing through the missing pulse generator is also fed to a delay network. This network causes the pulse to be delayed enough to coincide with the next pulse passing through the missing pulse generator. If the next pulse is not received by the generator, the delayed pulse will be permitted to pass to the output of the missing pulse generator and thereby be substituted for the missing pulse. If each pulse in the pulse train appears, none of the delayed pulses will be permitted to pass to the output of the missing pulse generator.

A received pulse is used to make a gate inhibited when the delayed pulse from the previously passed pulse is received by the gate. Should a pulse not be received, the gate will be in the noninhibit condition when the delayed pulse is received by the gate. Thus, the delayed pulse is passed by the gate and appears at the output of the missing pulse generator. This pulse also appears at the input of the delay circuit and will be delayed to supply the next pulse, should the next pulse also be missing.

BRIEF DESCRIPTION OF THE DRAWING FIG. l is a block schematic diagram of the present invention, and

FIG. 2 is the pulse timing chart of the present invention.

DESCRIPTION OF THE PREFERRED EMBODIMENT Referring to FIG. 11, missing pulse generator 3 is inserted in series with a line transmitting a continuous train of equally spaced pulses. The pulse generator operates only to supply a pulse or a plurality of pulses when one or more pulses are missing from the pulse train. Exemplary values on the drawing for the delay lines are chosen for an input pulse train having a pulse repetition rate of 100 Hz.

Nonrnissing Input Pulse Condition The periodic input pulses are received at J1 and pass through the (OR) circuit to output jack J2, as long as the input pulses occur at a constant millisecond period (100 Hz. pulse repetition rate) missing pulse generator 3 will not deliver a substitute missing pulse to input 2 of (OR) A substitute pulse is generated within the missing pulse generator 3 for each input pulse presented at J l. The substitute pulse is prevented from passing through Gate l to input 2 of OR by the presence of a pulse at J l. The internal operation of the missing pulse generator during the nonmissing pulse condition is as follows.

Each of the constantly spaced pulses occurring at J1 and delivered to J2 will also pass through CR and be delivered to the inputs of delay lines DH and DL2. The delay times of these delay lines are 0.5 pace. and 10.00] millisec. (l usec. longer than the natural I00 p.p.s. period). FIG. 2a shows the input pulse at J l. FIG. 2b shows the input pulse delayed by the 0.5 ,usec. delay line DLll. FIG. 2d shows the output pulse from 10.001 millisec. delay line DlL2. The output pulse from DL2 is derived from the previous J l input pulse and is delayed by one pulse rate frequency period (10 millisec.) plus 1 place.

The delayed 0.5 ptsec. pulse at the output of DLK (FIG. 2b) is used to set bistable multivibrator 2 whose output is shown in FIG. 26. The bistable multivibrators output is used for the control signal of Gate l. In the set condition, the output of multivibrator 2 (FIG. 20) inhibits the output of DL2 from passing through Gate l. The only outputs to J2 are those received at J l and passed through 0111 It is necessary to reset bistable multivibrator 2 before the next input pulse occurs at J 11. This is accomplished by use of 7 millisec. multivibrator ti and 1 ,usec. monostable multivibrator. Output pulses occurring at J2 trigger the 7 millisec. multivibrator. The 1 12sec. multivibrator t triggers from the training edge of the output pulse of 7 millisec. multivibrator ii. The l usec. output pulse from multivibrator 0 is used to reset bistable multivibrator 2, 3 millisec. prior to the occurrence of the next output pulse at J2.

The 7 millisec. period and the l psec. pulse width are not critical. The particular delay and width are chosen for this example. What is required is a delay and pulse width capable of resetting the bistable multivibrator some time before the occurrence of the next output pulse at J2. This reset pulse could be made to occur anywhere between the output pulses at J2.

Missing Pulse Condition Whenever an input pulse is missing from the train of constantly spaced input pulses at J1, the following events take place within the missing pulse generator. FIG. 2f shows the time location where a pulse should be received at input J 11. Since it is not received, it is called a missing pulse and is indicated in dashed lines. With a pulse repetition frequency of Hz., this location is l millisec. from the previous pulse. Bistable multivibrator 2 (FIG. ll) has been reset by the 7 millisec. delayed l 12sec. pulse from the previous pulse at Jll. The reset condition of the bistable multivibrator output control pulse will enable Gate l to pass input signals to its output. Since the input pulse to J l is missing, the gate circuit will still be in the noninhibit condition (FIG. 2g) when the delayed pulse from the previous pulse appears at the output of l0.00l millisec. delay line DL2 (FIG. 2h). The output pulse from DL2 (FIG. 2h) will pass through Gate ll, through OR,, and ap pear as the substitute output pulse at J2. Since this substitute timing pulse was derived from the previous input pulse and since the substitute pulse has passed through IDL2, it is delayed 1 ,usec. from the position where a nonmissing, regularly occurring input pulse at JI would have occurred. The substitute pulse appearing at the output of Gate l is also routed through 0R to the input of DLll, the 0.5 ,usec. delay line, and the input of 10.001 millisec. delay line 2. The output from the 0.5 ,usec. delay line sets bistable multivibrator 2. The output from multivibrator 2 places Gate l in the inhibit condition (FIGS. 2j and 2g). The 0.5 1sec. delay of DH is necessary to permit Gate l to pass the entire 0.5,usec. pulse before it is placed in the inhibit condition by its. own output pulse.

The substitute pulse entering Dl2 is used as the next substitute pulse in the event the next regularly occurring pulse at J1 is missing. Where the next input pulse at J l is missing the circuit operation is the same as previously explained for Missing Pulse Condition." The substitute pulse is derived from the previously supplied substitute pulse. If the next regularly occurring pulse at J1 is not missing, the input pulse will set bistable multivibrator 2 so that its output will inhibit gate 1 from passing the 10.001 millisec. delayed pulse from DLZ and the circuit action will be as explained under "Nonmissing Input Pulse Condition."

This invention has been disclosed with particular values for delay lines and multivibrators and with reference to specific types of gate circuits. Specific values placed on the components of this invention are for ease of understanding and are not intended to limit the invention as claimed. Additionally,

specific reference to OR and OR, as OR gates is not intended to limit applicant's invention to only OR gates since two diodes inserted for OR or R so as to permit conduction in the direction of the arrowheads in FIG. 1, would permit applicants device to operate as disclosed.

I claim:

1. A missing pulse generator comprising: an input and an output; a first OR gate connected between said input and said output; a first delay line and a gate circuit connected between said input and said first OR gate; a second delay line and bistable multivibrator connected in series between said input and said gate; and a monostable multivibrator connected between said output and said bistable multivibrator for causing said gate circuit to pass the output of said delay line to said output.

2. A missing pulse generator as set forth in claim 1 wherein and second OR gates being connected to said input; said 1 second inputs of said first and second OR" gates being connected to said output of said gate circuit; said first input of said gate circuit being connected to said first delay line and said second input of said gate circuit being connected to the output of said bistable multivibrator.

l t i l UNITED STATES PATENT OFFICE CERTIFICATE OF CORRECTION Dated November 2 1971 Patent No. 3 ,617

Inventor s Joseph N. Castelli It is certified that error appears in the above-identified patent and that said Letters Patent are hereby corrected as shown below:

On the cover sheet [73] "Sylvania Electric Products, Inc."

should read United States of America as represented by the Secretary of the Army Signed and sealed this 12th day of September 1972.

(SEAL) Attest:

EDWARD M .FLETCHER,JR. ROBERT GOTTSCHALK Attesting Officer Commissioner of Patents ORM P0-1050 {10-65) USCOMM-DC man-Pew 

1. A missing pulse generator comprising: an input and an output; a first ''''OR '''' gate connected between said input and said output; a first delay line and a gate circuit connected between said input and said first ''''OR'''' gate; a second delay line and bistable multivibrator connected in series between said input and said gate; and a monostable multivibrator connected between said output and said bistable multivibrator for causing said gate circuit to pass the output of said delay line to said output.
 2. A missing pulse generator as set forth in claim 1 wherein said bistable multivibrator has a set and reset input and an output; said monostable multivibrator being connected to said reset input and said second delay line being connected to said set input.
 3. A missing pulse generator as set forth in claim 2 to further comprise a second ''''OR'''' gate connected between said first and second delay lines and said input; said gate circuit, said first ''''OR'''' gate and said second ''''OR'''' gate having a first input, a second input and an output; said first inputs of said first and second ''''OR'''' gates being connected to said input; said second inputs of said first and second ''''OR'''' gates being connected to said output of said gate circuit; said first input of said gate circuit being connected to said first delay line and said second input of said gate circuit being connected to the output of said bistable multivibrator. 